Publications

[3] Korean version of "Digital Fundamentals: A System Approach," from Pearson, July 2014, ISBN: 9788998308056.

[2] Korean version of "Digital Systems: Principles and Applications," from Pearson, Dec. 2011, ISBN: 9788945001504.

[1] Korean version of “Beginning Visual Basic .NET Databases” from Wrox, Information Publishing Group, July 2002, ISBN: 8976279824.

[5] Jong-Uk Song, Soon-Bok Jang, Young-Wook Kim, Hyun-Jin Kim , “NAND flash memory system and method providing reduced power consumption,” U.S. Patent Application Number 13/547435, Jan 17, 2013.

[4] Byoung Own Min, Hyun Jin Kim, and Hyoung Jun Jeon, “Variable square-wave drive device,” U.S. Patent 7333541, February 19, 2008.

[3] Byoung Own Min, Hyoung Jun Jeon, and Hyun Jin Kim, “Piezoelectric actuator drive system,” U.S. Patent 7135807, November 14, 2006.

[2] Hyoung Jun Jeon, Byoung Own Min, and Hyun Jin Kim, “Single-stage backlight inverter and method for driving the same,” U.S. Patent 6930898, August 16, 2005.

[1] Byoung Own Min, Hyoung Jun Jeon, and Hyun Jin Kim, “Backlight inverter for liquid crystal display panel of asynchronous pulse width modulation driving type,” U.S. Patent 6864643, March 08, 2005.

[40] HyunJin Kim and Alberto A. Del Barrio, "Low-Biased Probabilistic Multipliers using Highly Inaccurate Compressors," https://doi.org/10.1016/j.dsp.2023.104364, Elsevier Digital Signal Processing, Vol. 146, 104364, March 2024. (SCIE) 

[39] Raul Murillo, Alberto A. Del Barrio, Guillermo Botella, Min Soo Kim, HyunJin Kim, and Nader Bagherzadeh, "PLAM: a Posit Logarithm-Approximate Multiplier," IEEE Trans. on Emerging Topics in Computing, http://10.1109/TETC.2021.3109127, Vol. 10, Issue 4, pp. 2079 - 2085, Oct.-Dec. 2022. (SCIE) 

[38]  Min Soo Kim, Alberto A. Del Barrio, HyunJin Kim, and Nader Bagherzadeh,  “Effects of Approximate Multiplication on Convolutional Neural Networks,” IEEE Transactions on Emerging Topics in Computing,  https://10.1109/TETC.2021.3050989,  Vol. 10, Issue 2, pp. 904 - 916, June 9, 2022.  (SCIE)

[37] HyunJin Kim, Mohammed Alnemari, and Nader Bagherzadeh, "A storage-efficient ensemble classification using filter sharing on binarized convolutional neural networks," PeerJ Computer Science, 8:e924 https://doi.org/10.7717/peerj-cs.924. March 29, 2022. (SCIE)

[36] Jungwoo Shin and HyunJin Kim, "PresB-Net: parametric binarized neural network with learnable activations and shuffled grouped convolution," PeerJ Computer Science, 8:e842 https://doi.org/10.7717/peerj-cs.842, January 3, 2022. (SCIE)

[35] HyunJin Kim and Alberto A. Del Barrio, "A Cost-Efficient Approximate Dynamic Ranged Multiplication and Approximation-Aware Training on Convolutional Neural Networks," IEEE Access, http://10.1109/ACCESS.2021.3117148, Vol. 9, pp.135513-135525, October 1, 2021. (SCIE) 

[34]  HyunJin Kim,  “A k-Mismatch String Matching for Generalized Edit Distance using Diagonal Skipping Method,” PLOS ONE, https://doi.org/10.1371/journal.pone.0251047,  May 4, 2021. (SCIE)

[33]  HyunJin Kim,  “AresB-Net: accurate residual binarized neural networks using shortcut concatenation and shuffled grouped convolution,”  PeerJ Computer Science, 7:e454, https://doi.org/10.7717/peerj-cs.454.  (SCIE)

[32] HyunJin Kim,  “A Low-Cost Compensated Approximate Multiplier for Bfloat16 Data Processing on CNN Inference,” ETRI Journal, https://doi.org/10.4218/etrij.2020-0370, Vol. 43, Issue 4, pp. 684-693. (SCIE)

[31] Jinhyuck Kim and HyunJin Kim, “A new fractional binary-to-decimal number conversion for errorless calculation, ”LNEE, Springer,  vol. 514, (SCOPUS)


[30] ThienLuan Ho, Seung-Rohk Oh, and  HyunJin Kim,  “New Algorithms for Fixed-length Approximate String Matching and Approximate Circular String Matching under the Hamming Distance,”   Journal of Supercomputing , Vol. 74, Issue 5, pp. 1815-1834. 2018. (SCI)

[29] ThienLuan Ho, Seung-Rohk Oh, and HyunJin Kim, “A Parallel Approximate String Matching under Levenshtein Distance on Graphics Processing Units using Warp-Shuffle Operations,” PLOS ONE, vol. 12, no. 10, e0186251, pp. 1-15, October 10, 2017. (SCIE)

[28] Jin Myung Yoon, Kang-Il Choi, and HyunJin Kim, “A Finite Automaton-based String Matching Engine on Graphic Processing Unit,” IEICE Trans. on Fundamentals, vo.E100-A, no. 9, pp. 2031-2033, September 1, 2017. (SCIE)

[27] ThienLuan Ho, HyunJin Kim , and Seung-Rohk Oh, “Parallel Approximate String Matching with k-Mismatches for Multiple Fixed-Length Patterns in DNA Sequences on Graphics Processing Units,” Journal of KIEE, vol. 66, no. 6, pp. 955-961, June 1, 2017. (Scopus)

[26] Jin Myoung Yoon, Kang-Il Choi, and HyunJin Kim, “Parallel String Matching and Optimization Using OpenCL on FPGA,” Journal of KIEE, vol. 66, no. 1, pp. 100-106, January 2017. (Scopus)

[25] HyunJin Kim and Kang-Il Choi, “A Pipelined Non-deterministic Finite Automaton-based String Matching Scheme using Merged State Transitions in an FPGA,” PLOS ONE, vol. 11, no. 10, e01646535, pp. 1-24, October 3, 2016. (SCIE)

[24] ThienLuan Ho, Seung-Rohk Oh, and HyunJin Kim, “Circular Bit-Vector-Mismatches: A New Approximate Circular String Matching with k-Mismatches,” IEICE Trans. on Fundamentals, vol. E99-A, no. 9, pp. 1726-1729, September 1, 2016. (SCIE)

[23] ThienLuan Ho, Seung-Rohk Oh, and HyunJin Kim, “A Parallel Aho-Corasick String Matching Approach on Graphic Processing Units using Non-overlapped Threads,” IEICE Trans. on Communications, vol. E99-B, no. 7 pp. 1523-1531, July 1, 2016. (SCI)

[22] HyunJin Kim, “A memory-efficient parallel string matching scheme using distributed pattern grouping without matching vectors,” IET Electroncis Letters, vol. 52, Issue 13, pp. 1124-1126, June 23, 2016. (SCI)

[21] HyunJin Kim, Kang-Il Choi, and Sang-Il Choi, “A Memory-Efficient Deterministic Finite Automaton-Based Bit-Split String Matching Scheme Using Pattern Uniqueness in Deep Packet Inspection,” PLOS ONE , vol. 10, no. 5, pp. 1-24, May 4, 2015. (SCIE)

[20] HyunJin Kim, “A Failureless Pipelined Aho-Corasick Algorithm for FPGA-based Parallel String Matching Engine,” Information Science and Applications, LNEE, Springer, pp. 157-164, 2015. (SCOPUS)

[19]  HyunJin Kim and Seung-Woo Lee, “A Hardware-Based String Matching Using State Transition Compression for Deep Packet Inspection,” ETRI Journal, vol. 35, no. 1, pp. 154-157, Feb. 2013. (SCI)

[18] Sang-Il Choi, Younggeun Choi, and Hyunjin Kim, “Composite vector selection for feature extraction in face recognition,” IET Electronics Letters,  vol. 49, no. 2, pp. 104-106, Jan.17, 2013. (SCI)

[17] HyunJin Kim, “A Memory-Efficient Bit-Split Pattern Matching Architecture Using Shared Match Vectors for Deep Packet Inspection,” IEICE Trans. on Communications, vol. E95-B, no. 11, pp. 3594-3596, November 2012. (SCI)  

[16] HyunJin Kim, “An iterative pattern mapping for parallel string matching architecture in intrusion detection systems,” IEICE Electronics Express, vol. 9, no. 11, pp. 985-989, June 12, 2012. (SCIE) 

[15] HyunJin Kim, Hong-Sik Kim, and Sungho Kang, “A memory-efficient bit-split parallel string matching using pattern dividing for intrusion detection systems,” IEEE Transactions on Parallel and Distributed Systems, vol. 22, no. 11, pp.1904~1911, November 2011. (SCI)

[14] Hong-Sik Kim, Joohong Lee, Hyunjin Kim , Sungho Kang, and Woo Chan Park, “A lossless color image compression architecture using parallel Golomb-Rice hardware codec,” IEEE Transactions on Circuits and Systems for Video Technology, vol. 21, no. 11, pp. 1581-1587, November 2011. (SCI)

[13] HyunJin Kim and Sungho Kang, “Communication-Aware Task Scheduling and Voltage Selection for Total Energy Minimization in Multiprocessor System using Ant Colony Optimization,” Information Sciences , vol. 181, no. 18, pp. 3995~4008, September 2011. (SCI)

[12] HyunJin Kim and Sungho Kang, “A pattern group partitioning for parallel string matching using a pattern grouping metric,” IEEE Communications Letters, vol. 14, no. 9, pp. 878-880, September 2010. (SCI)

[11] Seongyong Ahn, Hyejeong Hong, HyunJin Kim, Jin-Ho Ahn, Dongmyoung Baek, and Sungho Kang, “A hardware-efficient pattern matching architecture using process element tree fro deep packet inspection,” IEICE Trans. on Communications, vol. E93-B, no.4, pp. 2440-2442, September 2010. (SCI)

[10] Hong-Sik Kim, Youngha Jung, Hyunjin Kim, Jin-Ho Ahn, Woo-Chan Park, and Sungho Kang, “A high performance Network-on-Chip scheme using a lossless data compression,” IEICE Electronics Express, vol. 7, no. 11, pp. 791-796, June 2010. (SCIE)

[9] HyunJin Kim, Hyejeong Hong, Dongmyoung Baek, and Sungho Kang, “A pattern partitioning algorithm for memory-efficient parallel string matching in deep packet inspection,” IEICE Trans. on Communications, vol. E93-B, no. 6, pp. 1612-1614, June 2010. (SCI)

[8] Hyuntae Park, HyunJin Kim, Hong-Sik Kim, and Sungho Kang, “A fast IP address lookup algorithm based on search space reduction,” IEICE Trans. on Communications, vol.E93-B, no.4, pp.1009-1012, April 2010. (SCI)

[7] HyunJin Kim, Hyejeong Hong, Dongmyoung Baek, Jin-Ho Ahn, and Sungho Kang, “A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection,” IEICE Electronics Express, vol. 7, no. 5, pp. 377-382, March 2010. (SCIE)

[6] HyunJin Kim, Hong-Sik Kim, Jung-Hee Lee, Jin-Ho Ahn, and Sungho Kang, “A memory-efficient pattern matching with hardware-based bit-split string matchers for deep packet inspection,” IEICE Trans. on Communications, vol. E93-B, no. 2, pp.396-398, February 2010. (SCI)

[5] HyunJin Kim, Hyejeong Hong, Hong-Sik Kim, and Sungho Kang, “A memory-efficient parallel string matching for intrusion detection systems,” IEEE Communications Letters, vol. 13, no. 12, pp. 1004-1006, December 2009. ( SCI )

[4] Hyunjin Kim, Hyejeong Hong, Hong-Sik Kim, Jin-Ho Ahn and Sungho Kang, “Total energy minimization of real-time tasks in an on-chip multiprocessor using dynamic voltage scaling efficiency metric,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol. 27, no. 11, pp. 2088-2092, November 2008. (SCI)

[3] Hong-Sik Kim, Hyunjin Kim, and Sungho Kang, “Ant colony based efficient triplet calculation methodology for arithmetic built-in self test,” IEICE Electronics Express , vol. 5, no. 20, pp. 877-881, October 2008. (SCIE)

[2] Jin-Ho Ahn, Hyunjin Kim, Byung In Moon, and Sungho Kang, “System on a chip Implementation of social insect behavior for adaptive network routing,” Lecture Notes on Computer Science, vol. 4114, pp. 530-535, August 2006. (SCIE)

[1] Sung-il Bae, Hyun-Jin Kim, Hyuntae Park, and Sungho Kang, “An efficient parallel architecture using register-in-logic element for digital signal processing,”  International Journal of Computer Science and Network Security , vol.5, No.8, pp. 32-36, August 2005.


[24] HyunJin Kim, Jungwoo Shin, Wansoo Kim, Alberto A. Del Barrio, "1-D SPATIAL ATTENTION IN BINARIZED CONVOLUTIONAL NEURAL NETWORKS," Proceeding of IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 2024), April 2024. 

[23] Dongseop Kim and HyunJin Kim, "An Approximate String Matching using Diagonal  Skipping Method," SIPPR 2019, Dec 2019.

[22] HyunJin Kim, Min Soo Kim, Alberto A. Del Barrio, and Nader Bagherzadeh, “A Cost-Efficient Iterative Truncated Logarithmic Multiplication for Convolutional Neural Networks,” Proceeding of IEEE Symposium on Computer Arithmetic (ARITH), June 2019. 

[21] HyunJin Kim, Min Soo Kim, and Nader Bagherzadeh, “A Cost-Effective, High-Accuracy Two-Stage Approximate Logarithmic Multiplier, ” Work-In-Progress Poster of Design Automation Conference, June 2019. 

[20] JinMyung Yoon, Kang-Il Choi, and HyunJin Kim, “A Memory Accessing Method for the Parallel Aho-Corasick Algorithm on GPU,” Proceeding of International Conference on Information Science and Security (ICISS), December 2016.

[19] HyunJin Kim, “A Memory-Efficient Hardware-based Matching Filter using a Bitmap Compression,” Proceeding of International Conference on Electronics, Information, and Communication (ICEIC), pp. 954~955, January 2016.

[18] HyunJin Kim, “A Failureless Pipelined Aho-Corasick Algorithm for FPGA-based Parallel String Matching Engine,” International Conference on Information Science and Applications (ICISA), February 2015.

[17] HyunJin Kim and Kang-Il Choi, "An FPGA-based String Matching using Automatic HDL Code Generation," Proceeding of International Conference on Electronics, Information, and Communication (ICEIC), pp. 566~567, January 2015.

[16] Minsu Oh and  Hyunjin Kim, “A Protoype for Estimating SoC in the Battery-powered the Mobile System,” International SOC Design Conference Chip Design Contest, 2014.

[15] Dae-Sung Kim, Kyong-Ho Han, and Hyun-Jin Kim, “GPU based accelerating method of gene searching with PFAC algorithm,” Proceedings of 20th International Conference on Electrical Engineering (ICEE), pp. 751~753, June 2014.

[14] HyunJin Kim, “A distrubuted memory-based string matching with heterogeneous finite-state machine tiles for deep packet inspection,” Proceedings of ITC-CSCC , pp. 1161-1163, July 2013.

[13] HyunJin Kim, Seongyong Ahn, Hyejeong Hong, Hong-Sik Kim, and Sungho Kang, “Hybrid communication-aware task scheduling for energy minimization in on-chip multiprocessor,” Proceedings of IEEE Symposium on Low-Power and High-Speed Chips (Coolchips XII) , pp. 247-249, April 2009.

[12] Jin-ho Ahn, Hyunjin Kim, Youngho Park, and Sungho Kang, “SA-based test time optimization for SoCs using networks-on-chip,” Proceedings of 4th Conference on New Exploratory Technologies (NEXT), pp. 464-467, October 2007.

[11] Hong-Sik Kim, Hyunjin Kim, Jin-ho Ahn, and Sungho Kang, “A new LFSR reseeding based test compression scheme by virtual reduction of smax,” Proceedings of 4th Conference on New Exploratory Technologies (NEXT), pp. 83-86, October 2007.

[10] Hyunjin Kim, Jin-ho Ahn, Hong-Sik Kim, and Sungho Kang, “Power-aware task scheduling for dynamic voltage selection and power management for multiprocessors,” Proceedings of 4th Conference on New Exploratory Technologies (NEXT), pp. 165-169, October 2007.

[9] Hyunjin Kim, Hyejeong Hong, and Sungho Kang, “A compilation system development for regular reconfigurable architecture using abstract graph model,” Proceedings of International SOC Design Conference, pp. 259-262, October 2007.

[8] Hyunjin Kim, Hyejeong Hong, Sungho Kang, and Byung In Moon, “Regular mapping methodology on network on chip for heterogeneous tasking environment,” Proceedings of International SOC Design Conference, pp. 311-314, October 2006.

[7] Hyejeong Hong, Hyunjin Kim, and Sungho Kang, “An efficient operation mapping scheme on hypercube-based coprocessors with reconfigurable datapath,” Proceedings of International SOC Design Conference, pp. 383-386, October 2006.

[6] HyunJin Kim, Sung-il Bae, Hyuntae Park, and Sungho Kang, “A nested loop-level parallelism for DSP in reconfigurable computing using forward scheduling,” Proceedings of International SOC Design Conference, pp. 52-55, October 2005.

[5] Sung-il Bae, HyunJin Kim, Hyuntae Park, and Sungho Kang, “An efficient processor architecture for digital signal processing using registered logic,” Proceedings of International SOC Design Conference, pp. 48-51, October 2005.

[4] Hyun-Jin Kim, Jongcheol Shin, and Sungho Kang, “An efficient interconnect test using BIST module in a boundary scan environment,” Proceeding of International Conference on Computer Design (ICCD) , pp 328-329, October 1999.

[3] Jongcheol Shin, Hyun-Jin Kim, and Sungho Kang, “At-speed boundary-scan interconnect testing in a board with multiple system clocks,” Proceedings of International Conference on Design Automation and Test (DATE) , pp 473-477, March 1999.

[2] Hyun-Jin Kim, Jongcheol Shin, and  Sungho Kang, “A split walking one sequence,” Proceedings of International Technical Conference on CSCC (ITC-CSCC), pp 1329-1332, July 1998.

[1] Yong Tae Yim, Hyun-Jin Kim, and Sungho Kang, “An efficient BIST architecture for boards with multiple scan chains,” Proceedings of IEEE International Conference on VLSI and CAD, pp 367-369, October 1997.

[22] HyunJin Kim, Su Min Oh, REINFORCEMENT LEARNING METHOD AND APPARATUS USING LARGE LANGUAGE MODEL FOR INTEGRATED CIRCUIT OPTIMIZATION (집적회로의 최적화를 위한 대규모 언어 모델 기반 강화학습 방법 및 장치), 10-2024-0061004(Under Application).

[21] HyunJin Kim, Kyung Dong Yang, METHOD, APPARATUS AND SYSTEM FOR GENERATING TEST RESULT DATA FOR INTEGRATED CIRCUIT (집적회로에 대한 테스트 결과 데이터를 생성하는 방법, 장치 및 시스템),  10-2024-0036948, Mar. 18, 2024 (Under Application).

[20] HyunJin Kim, SYSTEMS FOR IMPLEMENTING BINARY NEURAL NETWORKS SUITABLE FOR PYRAMID STRUCTURE(피라미드 구조에 적합한 이진 뉴럴 네트워크 구현 시스템),  10-2632473, Jan 29, 2024.

[19] HyunJin Kim, Young Wook Kwon, Su Min Oh, Wafer Failure Pattern Classification Method using Image Matching (이미지 매칭을 이용한 웨이퍼 고장 패턴 분류 방법), 10-2023-0135773, 2023.10.12. (Under Application with SK Hynix)

[18] HyunJin Kim, CONVOLUTION CALCULATION METHOD OF BINARY NEURAL NETWORK APPLYING DATA STRUCTURE CAPABLE OF DATA REUSE (데이터 재사용이 가능한 데이터 구조를 적용한 이진 뉴럴네트워크의 콘볼루션 연산 방법), 10-2023-0166219, 2023.11.27. (Under Application)

[17] HyunJin Kim, SYSTEM AND METHOD OF AUTOMATIC ICON IMAGE GENERATION (아이콘 이미지 자동생성 시스템 및 방법), 10-2023-0057680, May 03, 2023. (Under Application)

[16] HyunJin Kim, Min Kee Chang, Young Wook Kwon, Wan Soo Kim, Dae Ryoung Shin, METHOD AND APPARATUS FOR CLASSIFYING AN IMAGE BASED ON A DEEP LEARNING (딥 러닝에 기반한 이미지 분류 방법 및 장치), 10-2023-0086601, July 04, 2023. (Under Application)

[15] HyunJin Kim, DongSeop Kim, Jiwon Song, "System and Method for Preprocessing and Data Set  Augmentation for training AI with 3D Data  Processing," 10-2194303, DEC 16, 2020.

[14] HyunJin Kim,  Application offloading device and method for network interface, 10-1977850, May 7, 2019. 

[13] HyunJin Kim, A NETWORK INTERFACE CONTROLLER WITH DATA STORAGE CAPABILITY AND A COMPUTING SYSTEM INCLUDING THE SAME(데이터 저장 기능이 포함된 네트워크 인터페이스 컨트롤러 및 그것을 포함하는 컴퓨팅 장치), 10-2018-0126255

[11] Jin-Hyuck Kim and HyunJin Kim, "Apparatus and method for base converting object having integer and fraction," 10-1787821, October 12, 2017.

[10] HyunJin Kim, "Apparatus and method for matching of character string," 10-1716017, March 7, 2017.

[9] Byoung Own Min, Hyoung Jun Jeon, and Hyun Jin Kim, "Drive system for piezoelectric actuator," 1006386180000 , August 19, 2006.

[8] Byoung Own Min, Hyoung Jun Jeon, and Hyun Jin Kim, "DC-DC converter with duty-selection control function,"  1005939250000 , June 20, 2006.

[7] Byoung Own Min, Hyoung Jun Jeon, and Hyun Jin Kim, "Back-light inverter with detecting function of switching device short,"  1006165990000 , August 21, 2006.

[6] Hyun Jin Kim, Byoung Own Min, and Hyoung Jun Jeon, "Triangle wave oscillation circuit with temperature compensation function,"  005509020000 , February 03, 2006.

[5] Byoung Own Min, Hyun Jin Kim, and Hyoung Jun Jeon, "Variable square wave driving apparatus," 1005336430000, November 29, 2005.

[4] Hyoung Jun Jeon, Byoung Own Min, and Hyun Jin Kim, "Single stage back-light inverter, and driving method thereof,"  1006165380000 , August 08, 2006.

[3] Hyun Jin Kim , "Power switch driver," 1020030060395, August 29, 2003.

[2] Hyun Jin Kim , "Back-light inverter for LCD panel of asynchronous PWM driving type,"  1005133180000 , April 04, 2005.

[1] Song Dong Sup, Sungho Kang, and Hyun Jin Kim, "Method of providing test vector for boundary scan test,"  1003797210000 , March 03, 2003.

[15] Jaewoo Lee and HyunJin Kim, "Highly Accurate Approximate Multiplier using Heterogeneous Inexact 4-2 Compressors for Error-resilient Applications," IEMEK J. Embed. Sys. Appl., vol. 16, issue 5, pp.233-240, October 2021.

[14] HyunJin Kim, "Analysis of Reduced-Width Truncated Mitchell Multiplication for Inferences Using CNNs," IEMEK J. Embed. Sys. Appl., vol. 15, no. 5, pp.235-242, October 2020.

[13]  HyunJin Kim and Yeon Sung Jung, “A Stock Price Prediction Based on Recurrent Convolution Neural Network with Weighted Loss Function, KIPS Transactions on Software and Data Engineering,” vol. 8, Issue 3, pp.123-128, March 2019. 

[12]  ThienLuan Ho, HyunJin Kim, and Seung-Rohk Oh, “Parallel Approximate String Matching with k-Mismatches for Multiple Fixed-Length Patterns in DNA Sequences on Graphics Processing Units,” The Transactions of the Korean Institute of Electrical Engineers, vol. 66, no. 6, pp. 955-961.

[11] Minsu Oh and HyunJin Kim, “A Prototype for Estimating State-of-Charge in the Battery-powered Mobile System,” IDEC Journal of Integrated Circuits and Systems, vol. 3, no. 3, July 2017.

[10] HyunJin Kim and Kang-Il Choi, “A memory-efficient two-stage string matching engine using both content-addressable memory and bit-split string matchers for deep packet inspection,” Journal of Korea Information and Communication Society, vol. 39B, no. 7, pp.433-439, July 2014.

[9] HyunJin Kim, HyeJeong Hong, Hong-Sik Kim, and Sungho Kang, “Energy-aware task scheduling for multiprocessors using dynamic voltage scaling and power shutdown,” Journal of The Institute of Electronics Engineers of Korea (IEEK), vol. 46-SD, no. 7, pp.22-28, July 2009.

[8] HyunJin Kim, HyeJeong Hong, Hong-Sik Kim, and Sungho Kang, “A resource-aware mapping algorithm for coarse-grained reconfigurable architecture using list scheduling,” Journal of The In stitute of Electronics Engineers of Korea (IEEK), vol. 46-SD, no. 6, pp. 58-64, June 2009.

[7] Hong-Sik Kim, Hyunjin Kim, Jin-Ho Ahn, and Sungho Kang, “An efficient test compression scheme based on LFSR reseeding,”Journal of The Institute of Electronics Engineers of Korea (IEEK), vol. 46-SD, no. 3, pp. 26-31, March 2009.

[6] Jin-Ho Ahn, Hong-Sik Kim, Hyunjin Kim, Youngho Park, and Sungho Kang, “Application core mapping to minimize the network latency on regular NoC architectures,” Journal of The Institute of Electronics Engineers of Korea (IEEK), vol. 45-SD, no. 4, pp. 117-123, April 2008.

[5] Hyejeong Hong, Hyunjin Kim, and Sungho Kang, “Implementation of a real-time spatio-temporal noise reduction system,” Journal of The Institute of Electronics Engineers of Korea (IEEK), vol. 45-SP, no. 2, pp. 74-80, March 2008.

[4] Jin-Ho Ahn, Hong-Sik Kim, Hyunjin Kim, Youngho Park, and Sungho Kang, “SA-based test scheduling to reduce the test time of NoC-based SoCs,” Journal of The Institute of Electronics Engineers of Korea (IEEK), vol. 45-SD, no. 2, pp. 93-99, February 2008.

[3] HyunJin Kim, Jong Chul Shin, YongTae Yim, and Sungho Kang, “A study on built-in self test for boards with multiple scan paths,” Journal of The Institute of Electronics Engineers of Korea (IEEK), vol. 36-C, no. 2, pp. 14-25, February 1999.

[2] HyunJin Kim, Jong Chul Shin, and Sungho Kang, “The split group walking sequence for the wiring interconnects in PCB,” Journal of The Korean Institute of Electrical Engineering (KIEE), vol. 47, no. 12, pp. 2251-2257, December 1998.

[1] Yong Tae Yim, Hyun Jin Kim, and Sungho Kang “A new IEEE standard 1149.1 backplane test extension for multiple board accesses,” Journal of The Korean Information Processing Society, vol. 5, no. 2, pp. 558-571, February 1998.